000 | 03275nam a22004695i 4500 | ||
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001 | 978-1-4614-4271-4 | ||
003 | DE-He213 | ||
005 | 20140220082814.0 | ||
007 | cr nn 008mamaa | ||
008 | 121204s2013 xxu| s |||| 0|eng d | ||
020 |
_a9781461442714 _9978-1-4614-4271-4 |
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024 | 7 |
_a10.1007/978-1-4614-4271-4 _2doi |
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050 | 4 | _aTK7888.4 | |
072 | 7 |
_aTJFC _2bicssc |
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072 | 7 |
_aTEC008010 _2bisacsh |
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082 | 0 | 4 |
_a621.3815 _223 |
100 | 1 |
_aChadha, Rakesh. _eauthor. |
|
245 | 1 | 3 |
_aAn ASIC Low Power Primer _h[electronic resource] : _bAnalysis, Techniques and Specification / _cby Rakesh Chadha, J. Bhasker. |
264 | 1 |
_aNew York, NY : _bSpringer New York : _bImprint: Springer, _c2013. |
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300 |
_aXIV, 217 p. 96 illus. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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347 |
_atext file _bPDF _2rda |
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505 | 0 | _aIntroduction -- Modeling of Power in Core Logic -- Modeling of Power in IOS and Micro Blocks -- Power and Analysis in ASCIS -- Design Intent for Power Management -- Architectural Techniques for Low Power -- Low Power Implementation Techniques -- UPF Power Specification -- CPF Power Specification -- Appendix A -- Appendix B -- Bibliography -- Index. | |
520 | _aThis book provides an invaluable primer on the techniques utilized in the design of low power digital semiconductor devices. Readers will benefit from the hands-on approach which starts form the ground-up, explaining with basic examples what power is, how it is measured and how it impacts on the design process of application-specific integrated circuits (ASICs). The authors use both the Unified Power Format (UPF) and Common Power Format (CPF) to describe in detail the power intent for an ASIC and then guide readers through a variety of architectural and implementation techniques that will help meet the power intent. From analyzing system power consumption, to techniques that can employed in a low power design, to a detailed description of two alternate standards for capturing the power directives at various phases of the design, this book is filled with information that will give ASIC designers a competitive edge in low-power design. Starts from the ground-up and explains what power is, how it is measured and how it impacts on the ASIC design process; Provides essential information in an easy to read and understand format, using basic examples; Explains what power intent is, how to describe it precisely and what techniques can be used to achieve the power intent with the two key standards, the Unified Power Format (UPF) and Common Power Format (CPF). | ||
650 | 0 | _aEngineering. | |
650 | 0 | _aComputer science. | |
650 | 0 | _aElectronics. | |
650 | 0 | _aSystems engineering. | |
650 | 1 | 4 | _aEngineering. |
650 | 2 | 4 | _aCircuits and Systems. |
650 | 2 | 4 | _aElectronics and Microelectronics, Instrumentation. |
650 | 2 | 4 | _aProcessor Architectures. |
700 | 1 |
_aBhasker, J. _eauthor. |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer eBooks | |
776 | 0 | 8 |
_iPrinted edition: _z9781461442707 |
856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-1-4614-4271-4 |
912 | _aZDB-2-ENG | ||
999 |
_c95101 _d95101 |