000 | 02720nam a22004335i 4500 | ||
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001 | 978-90-481-9255-7 | ||
003 | DE-He213 | ||
005 | 20140220084603.0 | ||
007 | cr nn 008mamaa | ||
008 | 100623s2010 ne | s |||| 0|eng d | ||
020 |
_a9789048192557 _9978-90-481-9255-7 |
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024 | 7 |
_a10.1007/978-90-481-9255-7 _2doi |
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050 | 4 | _aTK7888.4 | |
072 | 7 |
_aTJFC _2bicssc |
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072 | 7 |
_aTEC008010 _2bisacsh |
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082 | 0 | 4 |
_a621.3815 _223 |
100 | 1 |
_aRogin, Frank. _eauthor. |
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245 | 1 | 0 |
_aDebugging at the Electronic System Level _h[electronic resource] / _cby Frank Rogin, Rolf Drechsler. |
264 | 1 |
_aDordrecht : _bSpringer Netherlands : _bImprint: Springer, _c2010. |
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300 |
_aXVIII, 200p. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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_atext file _bPDF _2rda |
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520 | _aDebugging becomes more and more the bottleneck to chip design productivity, especially while developing modern complex integrated circuits and systems at the Electronic System Level (ESL). Today, debugging is still an unsystematic and lengthy process. Here, a simple reporting of a failure is not enough, anymore. Rather, it becomes more and more important not only to find many errors early during development but also to provide efficient methods for their isolation. In Debugging at the Electronic System Level the state-of-the-art of modeling and verification of ESL designs is reviewed. There, a particular focus is taken onto SystemC. Then, a reasoning hierarchy is introduced. The hierarchy combines well-known debugging techniques with whole new techniques to improve the verification efficiency at ESL. The proposed systematic debugging approach is supported amongst others by static code analysis, debug patterns, dynamic program slicing, design visualization, property generation, and automatic failure isolation. All techniques were empirically evaluated using real-world industrial designs. Summarized, the introduced approach enables a systematic search for errors in ESL designs. Here, the debugging techniques improve and accelerate error detection, observation, and isolation as well as design understanding. | ||
650 | 0 | _aEngineering. | |
650 | 0 | _aComputer science. | |
650 | 0 | _aSystems engineering. | |
650 | 1 | 4 | _aEngineering. |
650 | 2 | 4 | _aCircuits and Systems. |
650 | 2 | 4 | _aProcessor Architectures. |
700 | 1 |
_aDrechsler, Rolf. _eauthor. |
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710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer eBooks | |
776 | 0 | 8 |
_iPrinted edition: _z9789048192540 |
856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-90-481-9255-7 |
912 | _aZDB-2-ENG | ||
999 |
_c113620 _d113620 |