000 | 03042nam a22004695i 4500 | ||
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001 | 978-1-4419-8846-1 | ||
003 | DE-He213 | ||
005 | 20140220083728.0 | ||
007 | cr nn 008mamaa | ||
008 | 110708s2011 xxu| s |||| 0|eng d | ||
020 |
_a9781441988461 _9978-1-4419-8846-1 |
||
024 | 7 |
_a10.1007/978-1-4419-8846-1 _2doi |
|
050 | 4 | _aTK7888.4 | |
072 | 7 |
_aTJFC _2bicssc |
|
072 | 7 |
_aTEC008010 _2bisacsh |
|
082 | 0 | 4 |
_a621.3815 _223 |
100 | 1 |
_aRuiz-Amaya, Jesús. _eauthor. |
|
245 | 1 | 0 |
_aDevice-Level Modeling and Synthesis of High-Performance Pipeline ADCs _h[electronic resource] / _cby Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez. |
264 | 1 |
_aNew York, NY : _bSpringer New York : _bImprint: Springer, _c2011. |
|
300 |
_aXIII, 209p. 146 illus. _bonline resource. |
||
336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
||
338 |
_aonline resource _bcr _2rdacarrier |
||
347 |
_atext file _bPDF _2rda |
||
505 | 0 | _aPipeline ADC Overview -- Design Methodologies for Pipeline ADCs -- Pipeline ADC Electrical-level Synthesis Tool -- Behavioural Modeling of Pipeline ADCs -- Case Study: Design of a 10BIT@60MS Pipeline ADC -- Experimental Results and State of the Art -- Conclusions and Future Lines of Research. | |
520 | _aThis book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters. Describes efficient procedures for heirarchical top-down design of pipeline converters; Presents new methodologies to reduce bottom-up iterations, through inherent embedding of transistor-level parameters, such as parasitic capacitances, transconductances, and saturation currents; Provides mathematical details of behavioral models, includes descriptions of the synthesis methods and associated tools and illustrates models through case studies supported by silicon prototypes. | ||
650 | 0 | _aEngineering. | |
650 | 0 | _aComputer science. | |
650 | 0 | _aSystems engineering. | |
650 | 1 | 4 | _aEngineering. |
650 | 2 | 4 | _aCircuits and Systems. |
650 | 2 | 4 | _aSignal, Image and Speech Processing. |
650 | 2 | 4 | _aProcessor Architectures. |
700 | 1 |
_aDelgado-Restituto, Manuel. _eauthor. |
|
700 | 1 |
_aRodríguez-Vázquez, Ángel. _eauthor. |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer eBooks | |
776 | 0 | 8 |
_iPrinted edition: _z9781441988454 |
856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-1-4419-8846-1 |
912 | _aZDB-2-ENG | ||
999 |
_c106019 _d106019 |