Turbo Decoder Architecture for Beyond-4G Applications (Record no. 92146)
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000 -LEADER | |
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fixed length control field | 03652nam a22004695i 4500 |
001 - CONTROL NUMBER | |
control field | 978-1-4614-8310-6 |
003 - CONTROL NUMBER IDENTIFIER | |
control field | DE-He213 |
005 - DATE AND TIME OF LATEST TRANSACTION | |
control field | 20140220082501.0 |
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
fixed length control field | cr nn 008mamaa |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 131001s2014 xxu| s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 9781461483106 |
-- | 978-1-4614-8310-6 |
024 7# - OTHER STANDARD IDENTIFIER | |
Standard number or code | 10.1007/978-1-4614-8310-6 |
Source of number or code | doi |
050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
Classification number | TK7888.4 |
072 #7 - SUBJECT CATEGORY CODE | |
Subject category code | TJFC |
Source | bicssc |
072 #7 - SUBJECT CATEGORY CODE | |
Subject category code | TEC008010 |
Source | bisacsh |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 621.3815 |
Edition number | 23 |
100 1# - MAIN ENTRY--PERSONAL NAME | |
Personal name | Wong, Cheng-Chi. |
Relator term | author. |
245 10 - TITLE STATEMENT | |
Title | Turbo Decoder Architecture for Beyond-4G Applications |
Medium | [electronic resource] / |
Statement of responsibility, etc | by Cheng-Chi Wong, Hsie-Chia Chang. |
264 #1 - | |
-- | New York, NY : |
-- | Springer New York : |
-- | Imprint: Springer, |
-- | 2014. |
300 ## - PHYSICAL DESCRIPTION | |
Extent | VIII, 100 p. 36 illus., 3 illus. in color. |
Other physical details | online resource. |
336 ## - | |
-- | text |
-- | txt |
-- | rdacontent |
337 ## - | |
-- | computer |
-- | c |
-- | rdamedia |
338 ## - | |
-- | online resource |
-- | cr |
-- | rdacarrier |
347 ## - | |
-- | text file |
-- | |
-- | rda |
505 0# - FORMATTED CONTENTS NOTE | |
Formatted contents note | Introduction -- Conventional Architecture of Turbo Decoder -- Turbo Decoder with Parallel Processing -- Low-Complexity Solution for Highly Parallel Architecture -- High Efficiency Solution for Highly Parallel Architecture. |
520 ## - SUMMARY, ETC. | |
Summary, etc | This book describes the most recent techniques for turbo decoder implementation, especially for 4G and beyond 4G applications. The authors reveal techniques for the design of high-throughput decoders for future telecommunication systems, enabling designers to reduce hardware cost and shorten processing time. Coverage includes an explanation of VLSI implementation of the turbo decoder, from basic functional units to advanced parallel architecture. Several state-of-the-art techniques that improve complexity and/or throughput are introduced. The authors discuss both hardware architecture techniques and experimental results, showing the variations in area/throughput/performance with respect to several techniques. This book also illustrates turbo decoders for 3GPP-LTE/LTE-A and IEEE 802.16e/m standards, which provide a low-complexity but high-flexibility circuit structure to support these standards and enables designs that reconfigure block size and parallelism. Case studies include the discussions of both throughput and performance of each mode (block size/parallelism/iteration). This book not only highlights the critical design issues that restrict the speedup of parallel architecture, but it also provides the solutions to overcome these limitations by modifying slightly the turbo codec of modern standards. · Offers readers a complete introduction to practical turbo decoder design; · Describes different design methodologies and explains the trade-offs between performance improvement and overhead; · Explains modern techniques for state-of-the-art designs; · Includes simulation and implementation results with respect to various decoder circuit designs; · Reveals novel approaches to higher operating efficiency of turbo decoders for beyond 4G applications. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Engineering. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Computer science. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Telecommunication. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Systems engineering. |
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Engineering. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Circuits and Systems. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Communications Engineering, Networks. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Processor Architectures. |
700 1# - ADDED ENTRY--PERSONAL NAME | |
Personal name | Chang, Hsie-Chia. |
Relator term | author. |
710 2# - ADDED ENTRY--CORPORATE NAME | |
Corporate name or jurisdiction name as entry element | SpringerLink (Online service) |
773 0# - HOST ITEM ENTRY | |
Title | Springer eBooks |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
Display text | Printed edition: |
International Standard Book Number | 9781461483090 |
856 40 - ELECTRONIC LOCATION AND ACCESS | |
Uniform Resource Identifier | http://dx.doi.org/10.1007/978-1-4614-8310-6 |
912 ## - | |
-- | ZDB-2-ENG |
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