Analysis and Design of Resilient VLSI Circuits (Record no. 110277)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03531nam a22004455i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-1-4419-0931-2 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | DE-He213 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20140220084503.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 100301s2010 xxu| s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9781441909312 |
| -- | 978-1-4419-0931-2 |
| 024 7# - OTHER STANDARD IDENTIFIER | |
| Standard number or code | 10.1007/978-1-4419-0931-2 |
| Source of number or code | doi |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | TK7888.4 |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TJFC |
| Source | bicssc |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TEC008010 |
| Source | bisacsh |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.3815 |
| Edition number | 23 |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Garg, Rajesh. |
| Relator term | author. |
| 245 10 - TITLE STATEMENT | |
| Title | Analysis and Design of Resilient VLSI Circuits |
| Medium | [electronic resource] : |
| Remainder of title | Mitigating Soft Errors and Process Variations / |
| Statement of responsibility, etc | by Rajesh Garg, Sunil P. Khatri. |
| 264 #1 - | |
| -- | Boston, MA : |
| -- | Springer US, |
| -- | 2010. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Other physical details | online resource. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Soft Errors -- Analytical Determination of Radiation-induced Pulse Width in Combinational Circuits -- Analytical Determination of the Radiation-induced Pulse Shape -- Modeling Dynamic Stability of SRAMs in the Presence of Radiation Particle Strikes -- 3D Simulation and Analysis of the Radiation Tolerance of Voltage Scaled Digital Circuits -- Clamping Diode-based Radiation Tolerant Circuit Design Approach -- Split-output-based Radiation Tolerant Circuit Design Approach -- Process Variations -- Sensitizable Statistical Timing Analysis -- A Variation Tolerant Combinational Circuit Design Approach Using Parallel Gates -- Process Variation Tolerant Single-supply True Voltage Level Shifter -- Conclusions and Future Directions. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book is motivated by the challenges faced in designing reliable integratedsystems using modern VLSI processes. The reliable operation of Integrated Circuits (ICs) has become increasingly difficult to achieve in the deep sub-micron (DSM) era. With continuously decreasing device feature sizes, combined with lower supply voltages and higher operating frequencies, the noise immunity of VLSI circuits is decreasing alarmingly. Thus, VLSI circuits are becoming more vulnerable to noise effects such as crosstalk, power supply variations and radiation-induced soft errors. This book describes the design of resilient VLSI circuits. It presents algorithms to analyze the detrimental effects of radiation particle strikes and processing variations on the electrical behavior of VLSI circuits, as well as circuit design techniques to mitigate the impact of these problems. Describes the state of the art in the areas of radiation tolerant circuit design and process variation tolerant circuit design; Presents analytical approaches to test efficiently the severity of electrical effects of radiation/process variations, as well as techniques to minimize the effects due to these two problems; Distills content oriented toward nuclear engineers into leading-edge algorithms and techniques that can be understood easily and applied by VLSI designers. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer aided design. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Systems engineering. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer-Aided Engineering (CAD, CAE) and Design. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Khatri, Sunil P. |
| Relator term | author. |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY | |
| Title | Springer eBooks |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Display text | Printed edition: |
| International Standard Book Number | 9781441909305 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-1-4419-0931-2 |
| 912 ## - | |
| -- | ZDB-2-ENG |
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