Nanoscale Memory Repair (Record no. 105899)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03646nam a22004695i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-1-4419-7958-2 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | DE-He213 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20140220083726.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 110110s2011 xxu| s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9781441979582 |
| -- | 978-1-4419-7958-2 |
| 024 7# - OTHER STANDARD IDENTIFIER | |
| Standard number or code | 10.1007/978-1-4419-7958-2 |
| Source of number or code | doi |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | TK7888.4 |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TJFC |
| Source | bicssc |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TEC008010 |
| Source | bisacsh |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.3815 |
| Edition number | 23 |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Horiguchi, Masashi. |
| Relator term | author. |
| 245 10 - TITLE STATEMENT | |
| Title | Nanoscale Memory Repair |
| Medium | [electronic resource] / |
| Statement of responsibility, etc | by Masashi Horiguchi, Kiyoo Itoh. |
| 264 #1 - | |
| -- | New York, NY : |
| -- | Springer New York : |
| -- | Imprint: Springer, |
| -- | 2011. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | X, 218 p. |
| Other physical details | online resource. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 490 1# - SERIES STATEMENT | |
| Series statement | Integrated Circuits and Systems, |
| International Standard Serial Number | 1558-9412 |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | An Introduction to Repair Techniques: Basics of Redundancy -- Basics of Error Checking and Correction -- Comparison between Redundancy and ECC -- Repairs of Logic Circuits -- Redundancy: Models of Fault Distribution -- Yield Improvement through Redundancy -- Replacement Schemes -- Intra-Subarray Replacement -- Inter-Subarray Replacement -- Subarray Replacement -- Devices for Storing Addresses -- Testing for Redundancy -- Error Checking and Correction: Linear Algebra and Linear Codes -- Galois Field -- Error-Correcting Codes -- Coding and Decoding Circuits -- Theoretical Reduction in Soft-Error and Hard-Error Rates -- Application of ECC -- Testing for ECC -- Synergistic Effect of Redundancy and ECC: Repair of Bit Faults using Synergistic Effect -- Application of Synergistic Effect. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | Yield and reliability of memories have degraded with device and voltage scaling in the nano-scale era, due to ever-increasing hard/soft errors and device parameter variations. As a result, repair techniques have been indispensable for nano-scale memories. Without these techniques, even modern MPUs/ SoCs, in which memories have dominated the area and performance, could not have been designed successfully. This book systematically describes these yield and reliability issues in terms of mathematics and engineering, as well as an array of repair techniques, based on the authors’ long careers in developing memories and low-voltage CMOS circuits. Nanoscale Memory Repair gives a detailed explanation of the various yield models and calculations, as well as various, practical logic and circuits that are critical for higher yield and reliability. Presents the first comprehensive reference to reliability and repair techniques for nano-scale memories; Covers both the mathematical foundations and engineering applications of yield and reliability in nano-scale memories; Includes a variety of practical circuits and logic, critical for higher yield and reliability, which have been proven successful during the authors’ extensive experience in developing memories and low-voltage CMOS circuits. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer aided design. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Systems engineering. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer-Aided Engineering (CAD, CAE) and Design. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Itoh, Kiyoo. |
| Relator term | author. |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY | |
| Title | Springer eBooks |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Display text | Printed edition: |
| International Standard Book Number | 9781441979575 |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| Uniform title | Integrated Circuits and Systems, |
| -- | 1558-9412 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-1-4419-7958-2 |
| 912 ## - | |
| -- | ZDB-2-ENG |
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