Memory Controllers for Real-Time Embedded Systems (Record no. 100556)

000 -LEADER
fixed length control field 04239nam a22004695i 4500
001 - CONTROL NUMBER
control field 978-1-4419-8207-0
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20140220083233.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 110907s2012 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781441982070
-- 978-1-4419-8207-0
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/978-1-4419-8207-0
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7888.4
072 #7 - SUBJECT CATEGORY CODE
Subject category code TJFC
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code TEC008010
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Edition number 23
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Akesson, Benny.
Relator term author.
245 10 - TITLE STATEMENT
Title Memory Controllers for Real-Time Embedded Systems
Medium [electronic resource] :
Remainder of title Predictable and Composable Real-Time Systems /
Statement of responsibility, etc by Benny Akesson, Kees Goossens.
264 #1 -
-- New York, NY :
-- Springer New York :
-- Imprint: Springer,
-- 2012.
300 ## - PHYSICAL DESCRIPTION
Extent XXII, 222 p.
Other physical details online resource.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
490 1# - SERIES STATEMENT
Series statement Embedded Systems,
International Standard Serial Number 2193-0155 ;
Volume number/sequential designation 2
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Introduction -- Proposed Solution -- SDRAM Memories and Controllers -- Predictable SDRAM Back-End -- Resource Arbitration -- Composable Resource Front-End -- Configuration -- Related Work -- Conclusions and Future Work -- Appendix: System XML Specification.
520 ## - SUMMARY, ETC.
Summary, etc   Verification of real-time requirements in systems-on-chip becomes more complex as more applications are integrated. Predictable and composable systems can manage the increasing complexity using formal verification and simulation.  This book explains the concepts of predictability and composability and shows how to apply them to the design and analysis of a memory controller, which is a key component in any real-time system. This book is generally intended for readers interested in Systems-on-Chips with real-time applications.   It is especially well-suited for readers looking to use SDRAM memories in systems with hard or firm real-time requirements. There is a strong focus on real-time concepts, such as predictability and composability, as well as a brief discussion about memory controller architectures for high-performance computing. Readers will learn step-by-step how to go from an unpredictable SDRAM memory, offering highly variable bandwidth and latency, to a predictable and composable shared memory, providing guaranteed bandwidth and latency to isolated applications. This journey covers concepts for making memories and arbiters behave in a predictable and composable manner, as well as architecture descriptions of hardware blocks that implement the concepts. Provides an overview of trends in embedded system design that make design of real-time SoCs difficult, error-prone, and expensive; Introduces the concept of predictability, which is required for formal verification of real-time systems; Introduces the concept of composability, which is a divide and conquer technique that enables performance verification per application, instead of monolithic verification for all applications together; Describes a novel approach to composability, which applies to any predictable shared resource, thus widely extending the scope of composable platforms. This is the first approach that can efficiently support SDRAM, which is an essential system component; Provides an overview of the SDRAM architecture at a level that is relevant for system designers, not memory designers, and explains why SDRAM architectures are difficult to use in real-time systems; Describes concepts, architectures, implementation and worst-case performance analysis of predictable SDRAM accesses, as well as predictable and composable memory arbitration, which can be applied to all memory types
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Memory management (Computer science).
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Systems engineering.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Memory Structures.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Goossens, Kees.
Relator term author.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9781441982063
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Embedded Systems,
-- 2193-0155 ;
Volume number/sequential designation 2
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-1-4419-8207-0
912 ## -
-- ZDB-2-ENG

No items available.

2017 | The Technical University of Kenya Library | +254(020) 2219929, 3341639, 3343672 | library@tukenya.ac.ke | Haile Selassie Avenue